Study on fault-tolerant processors for advanced launch system

a final report for grant NAG-1-981 entitled

Publisher: National Aeronautics and Space Administration, Langley Research Center in Hampton, VA

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  • Fault-tolerant computing.

Edition Notes

Other titlesStudy on fault tolerant processors for advanced launch system., Final report for grant NAG-1-981 entitled.
StatementKang G. Shin and Jyh-Charn Liu.
SeriesNASA contractor report -- NASA CR-187637.
ContributionsLiu, Jyh-Charn., Langley Research Center.
The Physical Object
Pagination1 v.
ID Numbers
Open LibraryOL18066923M

provides fault-tolerant capabilities. The trends of very high clock speeds and very small transistors may make the entire chip prone to transient faults [29], and there is renewed interest in fault-toler-ant architectures for commodity, high-performancemicroproces-sors [24,2,22]. Slipstream processors provide substantial but incomplete fault cov-.   Computer Systems shall be designed by the manufacturer with the following minimum specifications a) Designed for continuous use, 24 hours per day, 7 days per week b) Be specified by the manufacturer as a "high-availability" system c) Have no less than two cooling fans d) have no less than two power supplies, each of which can supply power for the entire system and e) Have no less than . Fault-Tolerant Computing Systems Tests, Diagnosis, Fault Treatment 5th International GI/ITG/GMA Conference Nürnberg, September 25–27, Proceedings A New Approach for Designing Fault-Tolerant Array Processors. P. Poechmueller, M. Glesner. Pages Diagnose Fault-tolerant computers Fehlertolerierende Rechensysteme Simulation. processor only, we have a fault tolerant system, thus the process is able to run on second processor (as a back-up process). The part of fault tolerant operating system is its core for fault tolerance and/or resistance. It is set of high priority processes distributed to each processor, executing tasks and functions.

As you make your way through the book, you’ll launch code directly onto the GPU and write full blown GPU kernels and device functions in CUDA C. as well as advanced content for further study and a search utility for finding content on the CD and in the printed text. and fault-tolerant systems on AWSIdentify the tools required to. A Performance Evaluation of the Software-Implemented Fault-Tolerance Computer Daniel L. Palumbo* and Ricky W. Butlert NASA Langley Research Center, Hampton, Virginia The results of a performance evaluation of the Software-Implemented Fault-Tolerance (SIFT) computer system conducted in the NASA Avionics Integration Research Laboratory are Size: KB. Fault Tolerant Operating Systems* PETER J. DENNING Computer Science Department, Purdue University, West Lafayette, Indiana This paper develops four related architectural principles which can guide the construction of error-tolerant operating systems. The fundamental principle. The course will thus satisfy the needs of companies that have to decide between market offerings of fault-tolerant commercial products, and/or the need to integrate a fault-tolerant system out of non- fault-tolerant products. Course Objectives. At the end of this course you should.

  The part III of Fault-tolerant multi-agent optimization continues today with the third installment. Following the conclusions of the previous parts I and II of this series, this post extends the results to a global cost function with the definition of a family of functions C (normalization functions) between two weaker versions of the problem for crash faults Byzantine faults, respectively. A penetration test that focuses on the system (port scans, traceroute information, network mapping, and so forth) to identify weaknesses that could be used to launch an attack. SQL injection SQL is a language used for communicating with. Start studying CTC Chapter 8. Learn vocabulary, terms, and more with flashcards, games, and other study tools. @article{osti_, title = {Tightly coupled multiprocessor system speeds memory-access times}, author = {Frank, S.J.}, abstractNote = {A tightly coupled architecture of multiple processors automates the functions of expansion, system tuning, load balancing and data-base distribution-a major part of designing and implementing online systems.

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STUDY ON FAULT-TOLERANT PROCESSORS FOR ADVANCED LAUNCH SYSTEM Kang G. Shin and Jyh-Charn Liu Real-Time Computing Laboratory Department of Electrical Engineering and Computer Science The University of Michigan Ann Arbor, Michigan () ; e-mail: [email protected] Prepared for NASA Langley Research Center Mail Stop Get this from a library.

Study on fault-tolerant processors for advanced launch system: a final report for grant NAG entitled. [Kang G Shin; Jyh-Charn Liu; Langley Research Center.]. The paper presents a case study on implementation of the fault tolerant LEON-3 processor system on a chip for space applications.

The single-event upset (SEU) tolerance is provided by design. The Configurable Fault Tolerant Processor (CFTP), developed by the Space Systems Academic Group at the Naval Postgraduate School, is an experimental payload on board the United States Naval Academy's (USNA) MidSTAR-1 satellite.

Midstar-1 was launched into a km low earth orbit (LEO) on March 8,aboard an Atlas V expendable launch vehicle from Cape Canaveral Air Force Station, along. The paper presents a case study on implementation of the fault tolerant LEON-3 processor system on a chip for space applications.

The single-event upset (SEU) tolerance is provided by design. The technique applied detects and corrects up to 4 errors in the register file and caches. The implementation details and system-on-chip features are summarized.

Fault-Tolerant Systems is the first book on fault tolerance design with a systems approach to both hardware and software. No other text on the market takes this approach, nor offers the comprehensive and up-to-date treatment that Koren and Krishna provide.

Novel fault-tolerant schemes 6 such as roll- forward techniques may, therefore, find applications. Consequently, what this book brings into focus are these various issues for both mature and emerging technologies.

An overview of the basic concepts is dealt with in Chapter 1, followed by a discussion of various architectures in Chapter : Dhiraj K. Pradhan. Aiming at raising the reliability of the system and making better use of system resources, this paper studies the performance of a fault tolerant multiprocessor system.

The fault tolerance strategy used by the system involves how to reallocate tasks that are blocked by breakdown processors and at the same time avoid tasks missing their : Jianxin Jiao, Maode Ma, Mitchell M.

Tseng. This thesis will focus on the implementation of a fault tolerant computer system. The hardware design presented here has two different benefits. First, the system can act as a software testbed, which allows testing of software fault tolerant techniques in the presence of radiation induced : David C.

Summers. • A highly reliable system is not necessarily fault tolerant – a very simple system can be designed using very good components such that the probability of hardware failing is very low – but if the hardware fails, the system cannot continue its functions p. 34 - Design of Fault Tolerant Systems - Elena Dubrova, ESDlab How fault tolerance File Size: 90KB.

Example: N processors in a gracefully degrading system ♦System is useful as long as at least one processor remains operational ♦Let Pi = Prob {i processors are operational} ♦Let c = computational capacity of a processor (e.g., number of fixed-size tasks it can execute) ♦Computational capacity of i processors: Ci = i • c.

fault-tolerant system [1]. The result was an operational unit having certain fault tolerant level, as a sum of the safety levels of each equipment of the system. From another point of view a system is dependable if it is available, reliable, safe, and secure [2].

Advanced. into the system. In this design, up to five random numbers Hardware Redundancy 1) Implementation Hardware redundancy uses extra hardware to support the system being fault tolerant. Control unit and ALU are two parts we applied the hardware redundancy method to in the five stage pipelined CPU design.

Control unit sets upFile Size: KB. Fault-Tolerant Systems is the first book on fault tolerance design with a systems approach to both hardware and software. No other text on the market takes this approach, nor offers the comprehensive and up-to-date treatment that Koren and Krishna provide.

This book incorporates case studies that highlight six different computer systems with fault-tolerance techniques implemented in their design. A well thought control system design is to make some suitable trade-offs between these two specifications. In the fault tolerant control system design, the designed controller will guarantee the stability of the resulting closed loop system under faults at a cost of degrading the performance when there is no fault in the system.

(Montgomery and Runger, Edition 3, Problem 3–84). A fault-tolerant system that processes transactions for a financial services firm uses three separate computers.

If the operating computer fails, then one of the two spares can immediately be switched online. After the second computer fails, then the last computer can immediately be File Size: 11KB.

nontrivial problem: the design of a fault-tolerant process-control system. Section 6 contrasts our work with other approaches to designing fault-tolerant systems, and Section 7 presents some conclusions. FAIL-STOP PROCESSORS Definition A processor is characterized by its instruction set.

Software fault tolerant technique is an important means to improve the reliability of Automatic Mechanical Transmission (AMT) control system. In the paper, the fault tolerant characteristics of AMT control software were introduced. Based on that, Cited by: 4. Here, we propose an effective fault tolerant real-time multiprocessor system model with the same level of redundancy as that of a traditional system but can handle additional workload at no extra.

HLV Avionics Flight Computing Architecture Study – 2 of 88 Preface This study was performed in response to a potential future need to assess and/or design avionics architectures for a Heavy Lift Launch Vehicle (HLLV).

It is recognized that this study’s assessments are in. Advances on Adaptive Fault-Tolerant System Components: Micro-processors, NoCs, and DRAM Alirad Malek Göteborg, Sweden, ISBN: Ioannis Sourdis Advisor Assoc.

Professor at Chalmers University of Technology Vassilis Papaefstathiou Co-Advisor Post Doctoral researcher at FORTH-ICS Onur Mutlu Thesis Opponent Professor at ETH Author: Alirad Malek.

Software fault tolerance is the ability of computer software to continue its normal operation despite the presence of system or hardware faults. Fault-tolerant software. fault-tolerant architecture, hardware-software co-design technology is used to exploit the fault-tolerant metric, which is a trade-off between software flexibility and hardware high-efficiency.

The system architecture for multi-core SoC is shown in figure : Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang. A Review on Fault Tolerant Analysis for Hard Real Time Safety Critical Embedded System Nisha O.

S., Dr. Siva Sankar IT Department, Nooral Islam University, Nagercoil, India Abstract— Safety-Critical Applications have to function correctly and deliver high level of.

VHDL IP core library, which is a complete System-on-a-chip design environment available for end-user development: • Processors • Peripherals • Memory controllers • Serial and parallel high speed interfaces • AMBA on-chip bus with Plug & Play support • Fault tolerant and standard version • Support for many tools & prototyping boards.

Advanced Fault Tolerance Solutions for High Performance Computing Workshop on Trends, Technologies and Collaborative Opportunities in High Performance and Grid Computing 6/38 Talk Outline.

High performance computing system architectures. Fault tolerance solutions for. NASA Images Solar System Collection Ames Research Center. Brooklyn Museum.

Full text of "Future manned systems advanced avionics study" See other formats. AC Chapter STUDY. PLAY. computer errors and are built on the concept of: Flying Start Site. A disaster recovery site that includes a computer system similar to the one the company regularly uses, software, and up-to-date data so the company can resume full data processing operations within seconds or minutes Fault Tolerant.

Chapter28 Fault-TolerantDesignofLocalESS Processors^ OverviewThestoredprogramcontrolofBellSystemElectronicSwitch- ingSystems(ESS. Introduction.

Fault-tolerance is the ability of a system to maintain its functionality, even in the presence of faults.

It has been extensively studied in the literature: [] and [] gives an exhaustive list of the basic concepts and terminology on fault-tolerance, [] introduces two fundamental notions for fault-tolerance, namely failure mode assumption and assumption coverage, and.

Abstract—Software-based fault-tolerant techniques at the operating system level are an effective way to enhance the reliability of safety-critical embedded applications. This paper provides an analysis and comparison of five well-known recovery techniques, i.e., micro rebooting, recovery block, N-Version.Fault tolerance has been an active research area for many years.

This volume presents papers from a workshop held in where a small number of key researchers and practitioners in the area met to discuss the experiences of industrial practitioners, to provide a perspective on the state of the art of fault tolerance research, to determine whether the subject is becoming mature, and to learn.fault-tolerant system that recovers from multiple link failures in the data plane.

Reitblatt et al. recently proposed a new language, FatTire [22], that facilitates the design of fault-tolerant network programs. The proposed compiler targets the in-network fast-failover mechanisms provided in recent.